Accelerate the World
Careers
Our Team
Our Team is building the future of technology, and so we look for the best and brightest to help us get there. We are made up of people from across the world striving to be at the forefront of innovation.
Current Positions
IC Design Engineer - Entry Level
Location: Singapore
This position is for a new or recent college graduate with a bachelor or master’s degree in electrical or Electronics Engineering. The candidate should be eager to learn and practice the discipline of microchip design and must bring strong technical fundamentals and knowledge of circuit design theory. This rigorous engineering discipline requires technical depth, flexibility, perseverance, and a passion for solving complex and difficult problems.
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Pay Range For This Position:
SG$30 - SG$50 Per hour
Requirements:
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MS or BS in Electrical Engineering, Electronics Engineering, or Physics with emphasis on circuit design including analog, digital, and mixed-signal design
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Knowledge of the IC development flow in advanced CMOS processes including design, layout, and tape-out
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Knowledge of the basic theories of digital or analog circuit design
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Ability to create innovative designs and circuit solutions to meet customer requirements
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Ability to work in a startup environment, and to work both independently and as a team player as circumstances indicate
Experience in one or more of the following areas considered a strong plus:
-
Previous tape-out experience in industry leading technology nodes
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Familiarity with industry standard IC design CAD tools such as Cadence, Synopsys, or others
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Experience with memory technologies, especially emerging non-volatile memory technologies
To apply, please send your resume to hrteam@tetramem.com
ASIC/SoC Design Verification Engineer
Location: Fremont, CA
In this role, you will be part of a world-class IC design team responsible for defining and developing a revolutionary computing system, which we believe can reduce the energy consumption of AI processing by more than two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory technologies with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance.
We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, daycare subsidy, and other perks.
Pay Range For This Position:
$110,000 - $250,000
Responsibilities:
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Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
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Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
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Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels.
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Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out.
-
Work with design engineers to debug and identify root causes of simulation failure.
-
Support test engineers for post-silicon validation.
-
Mentor and coach team members and junior engineers. Drive verification efficiency.
Requirements:
-
MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
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In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
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Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
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Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
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Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
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Experience in verifying designs at both of RTL level and post-P&R gate level.
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Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
-
Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
-
Experience in verifying mix-signal design and interface of digital and analog.
-
Experience of design verification for highspeed IO such as PCIE and DDR.
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Analog/Mixed-Signal IC Designer - Entry Level
Location: Singapore
This position is for a new or recent college graduate with a bachelor or master’s degree in electrical or Electronics Engineering. The candidate should be eager to learn and practice the discipline of microchip design and must bring strong technical fundamentals and knowledge of circuit design theory including analog, and mixed-signal. This rigorous engineering discipline requires technical depth, flexibility, perseverance, and a passion for solving complex and difficult problems.
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Pay Range For This Position:
SG$30 - SG$50 Per hour
Requirements:
-
MS or BS in Electrical Engineering, Electronics Engineering, or Physics with emphasis on CMOS analog/mixed-signal integrated circuit design
-
Knowledge of the IC development flow in advanced CMOS processes including design, layout, and tape-out
-
Strong knowledge in analog/mixed-signal circuits such as Op-Amp, bandgap, regulator, data converter, etc.
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Familiar with common EDA environments, and design/simulation/layout CAD tools (e.g., Synopsys, Cadence, Mentor Graphics etc.)
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Ability to work in a startup environment, and to work both independently and as a team player as circumstances indicate
Experience in one or more of the following areas considered a strong plus:
-
Hands-on experience and in-depth knowledge in CMOS low-power design and techniques
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Hands-on experience with DAC and ADC design
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Experience with memories, especially emerging non-volatile memory
To apply, please send your resume to hrteam@tetramem.com
ASIC RTL Design Engineer
Location: Fremont, CA & Singapore
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Pay Range For This Position:
Singapore: SG$80,000 - SG$180,000
Fremont: $110,000 - $250,000
Responsibilities:
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RTL design, simulation and verification for TetraMem ASIC / SoC products
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IP integration and validation
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Understand internal and external requirements, PPA study, RTL coding, implementation and work with backend team
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Develop reusable internal IPs for AI and/or in-memory computing products
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Support Post-Si testing and validation
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Mentor and coach junior engineers
Requirements:
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MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design
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Experience with Verilog and system Verilog
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Experience with VCS, Verdi or other industry standard tools
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Experience with pre-layout simulation and post-layout simulation
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Understanding of the design flow. Ability to work with the backend team
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Familiarity with AMBA APB AXI Protocol
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Familiarity with RISC/Arm or other core architectures
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Ability to create innovative architecture and solutions to customer requirements
-
Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.
Experience in one or more of the following areas considered a strong plus:
-
FPGA/ASIC design of image processing systems
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Working knowledge of SoC architecture such as CPU, GPU or accelerators
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Familiarity with: UVM, place-and-route, STA, EM/IR/Power
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
ASIC Design Verification Engineer
Location: Singapore
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Pay Range For This Position:
SG$80,000 - SG$180,000
Responsibilities:
-
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
-
Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
-
Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral modules for both block levels and system levels.
-
Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
-
Work with design engineers to debug and identify root causes of simulation failure
-
Support test engineers for post-silicon validation
-
Mentor and coach junior engineers. Drive verification efficiency
Requirements:
-
MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
-
In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
-
Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification
-
Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
-
Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
-
Experience in verifying designs at both RTL level and post-P&R gate level
-
Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
-
Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
-
Experience in verifying mix-signal design and interface of digital and analog
-
Experience of design verification for high-speed IO such as PCIE and DDR
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Device Test Engineer
Location: Fremont, CA
Responsibilities:
As a Device Test Engineer, the responsibilities include, but are not limited to the following:
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Develop test software based on memristor devices.
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Automate testing flows, reduce testing time and write scripts in data parsing.
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Define test flow and characterize chip functionalities with high quality standards.
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Generate test and characterization reports with statistics analysis for process DOE (Design of Experiments)
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Participate in troubleshooting and support design/device/process engineers in all testing activities.
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Must be able to manage project progress and meet deadlines.
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Perform debug and failure analyses during manufacturing builds and participate in continuous improvements in product manufacturability and testability, contributing to the production of the highest quality products
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Perform maintenance of lab equipment periodically
EDUCATION REQUIREMENTS/ PREFERENCE
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This position requires a Master’s degree (in CS or related field) with a minimum 3+ years of related experience.
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Experiences of Non-volatile memory (such as RRAM, PRAM, FLASH, and MRAM)
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Experiences advanced node CMOS characterization
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Hardware bring-up, characterization, validation, and deployment to external vendor
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Individuals should have extensive experience in testing, and characterization labs.
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At least three years of demonstrable experience with hardware testing, and using lab/test equipment (e.g. oscilloscope, waveform generators, …) and performing test data analysis
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Extensive knowledge in design of experiments, statistical methods, and data analysis is a must.
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Strong knowledge of semiconductor product testing and characterization equipment
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The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.
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Self-motivated, self-directed, however, must have demonstrated the ability to work well with people.
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The candidate must have a proven desire to work as a team member, both on the same team and outside of the team, and within a cross-functional environment.
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Should be able to troubleshoot, multi-task and meet deadlines.
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Excellent communication (written and verbal) and interpersonal skills.
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Experience in wafer, die and package handling
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Experience with semi-automated and automated processing tools (ATE and Wafer probe)
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Proficient in C/C++. Knowledge of Python is a plus.
Job Types: Full-time
Pay: $110,000-$250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Analog/Mixed-Signal IC Designer
Fremont, CA
Requirements:
-
MS or PhD in Electrical Engineering with emphasis on CMOS analog/mixed-signal integrated circuit design
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5+ years of experience in analog or mixed-signal IC development in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries
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Strong knowledge in analog/mixed signal circuits such as OpAmps, bandgap, voltage/current references
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Familiar with common EDA environment tools, CAD tools and Analog design methodology including design, simulation, layout, and verification tools (e.g., Synopsys, Cadence, Mentor Graphics etc.)
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In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
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Hands-on experience with analog mixed-signal IC development from definition to high-volume production including layout supervision and bench characterization
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Ability to create innovative architecture and circuit solutions to meet customer requirements
-
Ability to work in a startup environment and to work both independently and as a team player
Experience in one or more of the following areas considered a strong plus:
-
Hands-on experience in data converter (ADC/DAC) design and techniques
-
Hands-on experience in memory design or in-memory computing circuit design
-
Hands-on experience in AMS design and verification methodology
Job Types: Full-time
Pay: $110,000-250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Analog Layout Lead Engineer
Fremont, CA & Singapore
Responsibilities:
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Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout
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Collaborate with project managers and design engineers to understand project requirements
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Drive critical floor-planning decisions and key layout methodology
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Ensure that all designs meet project requirements and adhere to design guidelines
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Review and approve final layout designs for production
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Stay up-to-date with industry trends and advancements in design software and techniques
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Attend project meetings, presentations, and other events as needed
Requirements:
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B.S. EE and 8+ years of relevant industry experience or equivalent
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Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes
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Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS
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Strong understanding of layout design principles and best practices
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Excellent communication, collaboration, and leadership skills
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Ability to manage multiple projects simultaneously while maintaining attention to detail
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Demonstrated ability to work independently and as part of a team
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Strong problem-solving and decision-making skills
Job Types: Full-time
Pay:
Singapore: SG$80,000 - SG$180,000
Fremont: $110,000 - $250,000
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Sr. Analog/Mixed-Signal IC Verification Engineer
Fremont, CA
Responsibilities:
-
Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
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Design and develop verification testbenches using industry-standard verification languages and methodologies
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Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
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Review and analyze verification results, and provide feedback to design teams
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Collaborate with design and layout teams to identify and resolve design issues
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Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
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Sign-off mixed signal designs in preparation for tapeout
Requirements:
-
B.S. EE and 7+ years of relevant industry experience or equivalent
-
Strong understanding of analog and mixed-signal circuit design and verification principles
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Ability to write test plans, present results, and communicate clearly with multi-functional teams
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Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection
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Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
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Excellent debugging, problem-solving and analytical skills
-
Strong communication and teamwork skills
-
Familiarity with analog behavioral models is a plus
Job Types: Full-time
Pay: $110,000-250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Silicon Validation Designer (Functional Testing)
Fremont, CA
Responsibilities:
● Testing and silicon debug, including writing the necessary testing code, testing platform setup, and silicon screening and debugging. Contribute to testing methodology and setup including probe card, packaged chip, and PCB testing.
● Analysis of signal integrity, noise, power, and other design issues. Work with the design team to verify circuit features and debug issues
● Help with product demo setup and running different demo benchmark/showroom projects as needed
Requirements:
● MS or PhD in Electrical Engineering or computer engineering
● Working knowledge of testing instruments such as oscilloscopes, signal generator
● Working knowledge of microcontrollers (Arduino, Raspberry Pi) and/or FPGA (Xilinx or Intel)
● Scripting in C/C++, Python, Perl
● Ability to drive drivers for embedded systems in C
● Ability to work in a startup environment and to work both independently and as a team player
Experience in one or more of the following areas is considered a strong plus:
● Working knowledge of data converter systems (DAC, ADC)
● Working knowledge of analog circuits (OpAmps, bandgap, temperature sensors)
● Working knowledge of RISC-V CPUs
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer, Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
Job Types: Full-time
Pay: $110,000-250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com