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Careers
Our Team
Our Team is building the future of technology, and so we look for the best and brightest to help us get there. We are made up of people from across the world striving to be at the forefront of innovation.
Current Positions
IC Design Engineer - Entry Level
Location: Singapore
This position is for a new or recent college graduate with a bachelor or master’s degree in electrical or Electronics Engineering. The candidate should be eager to learn and practice the discipline of microchip design and must bring strong technical fundamentals and knowledge of circuit design theory. This rigorous engineering discipline requires technical depth, flexibility, perseverance, and a passion for solving complex and difficult problems.
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Requirements:
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MS or BS in Electrical Engineering, Electronics Engineering, or Physics with emphasis on circuit design including analog, digital, and mixed-signal design
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Knowledge of the IC development flow in advanced CMOS processes including design, layout, and tape-out
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Knowledge of the basic theories of digital or analog circuit design
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Ability to create innovative designs and circuit solutions to meet customer requirements
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Ability to work in a startup environment, and to work both independently and as a team player as circumstances indicate
Experience in one or more of the following areas considered a strong plus:
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Previous tape-out experience in industry leading technology nodes
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Familiarity with industry standard IC design CAD tools such as Cadence, Synopsys, or others
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Experience with memory technologies, especially emerging non-volatile memory technologies
Job Type: Full-time
Pay Range For This Position:
SG$30 - SG$50 Per hour
To apply, please send your resume to hrteam@tetramem.com
ASIC/SoC Design Verification Engineer
Location: Fremont, CA
In this role, you will be part of a world-class IC design team responsible for defining and developing a revolutionary computing system, which we believe can reduce the energy consumption of AI processing by more than two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory technologies with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance.
We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, daycare subsidy, and other perks.
Responsibilities:
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Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
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Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
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Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels.
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Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out.
-
Work with design engineers to debug and identify root causes of simulation failure.
-
Support test engineers for post-silicon validation.
-
Mentor and coach team members and junior engineers. Drive verification efficiency.
Requirements:
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MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
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In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
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Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
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Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
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Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
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Experience in verifying designs at both of RTL level and post-P&R gate level.
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Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
-
Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
-
Experience in verifying mix-signal design and interface of digital and analog.
-
Experience of design verification for highspeed IO such as PCIE and DDR.
Job Type: Full-time
Pay Range For This Position:
$110,000 - $250,000
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
ASIC RTL Design Engineer
Location: Fremont, CA & Singapore
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Responsibilities:
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Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs.
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Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.
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Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs.
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Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout.
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Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications.
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Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product.
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Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth.
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Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability.
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Stay up-to-date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency.
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Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery.
Requirements:
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MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design
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Experience with Verilog and system Verilog
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Experience with VCS, Verdi or other industry standard tools
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Experience with pre-layout simulation and post-layout simulation
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Understanding of the design flow. Ability to work with the backend team
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Familiarity with AMBA APB AXI Protocol
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Familiarity with RISC/Arm or other core architectures
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Ability to create innovative architecture and solutions to customer requirements
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Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.
Experience in one or more of the following areas considered a strong plus:
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FPGA/ASIC design of image processing systems
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Working knowledge of SoC architecture such as CPU, GPU or accelerators
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Familiarity with: UVM, place-and-route, STA, EM/IR/Power
Job Type: Full-time
Pay Range For This Position:
Singapore: SG$80,000 - SG$180,000
Fremont: $110,000 - $250,000
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
ASIC Design Verification Engineer
Location: Singapore
In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.
Responsibilities:
-
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
-
Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
-
Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral modules for both block levels and system levels.
-
Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
-
Work with design engineers to debug and identify root causes of simulation failure
-
Support test engineers for post-silicon validation
-
Mentor and coach junior engineers. Drive verification efficiency
Requirements:
-
MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
-
In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
-
Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification
-
Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
-
Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
-
Experience in verifying designs at both RTL level and post-P&R gate level
-
Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
-
Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
-
Experience in verifying mix-signal design and interface of digital and analog
-
Experience of design verification for high-speed IO such as PCIE and DDR
Job Type: Full-time
Pay Range For This Position:
SG$80,000 - SG$180,000
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Sr. Analog/Mixed-Signal IC Verification Engineer
Location: Fremont, CA
Responsibilities:
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Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
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Design and develop verification testbenches using industry-standard verification languages and methodologies
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Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
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Review and analyze verification results, and provide feedback to design teams
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Collaborate with design and layout teams to identify and resolve design issues
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Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
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Sign-off mixed signal designs in preparation for tapeout
Requirements:
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B.S. EE and 7+ years of relevant industry experience or equivalent
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Strong understanding of analog and mixed-signal circuit design and verification principles
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Ability to write test plans, present results, and communicate clearly with multi-functional teams
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Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection
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Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
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Excellent debugging, problem-solving and analytical skills
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Strong communication and teamwork skills
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Familiarity with analog behavioral models is a plus
Job Type: Full-time
Pay Range For This Position:
$110,000-250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Electrical Design Engineer
Location: Fremont, CA
Responsibilities:
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Design and simulation of printed circuits (PCB, PCA, Flex, etc.) for internal testing boards for our next generation SOC designs and NPU test chip designs, including analysis of signal integrity, power integrity, and other on-board issues.
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Manage and direct technical communications with layout, PCB fab, and assembly vendors for production of test boards and prototypes.
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Work with design team to verify circuit features and debug issues.
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Design prototype and demo systems for application development, with and for select customers.
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Design hardware and help develop firmware code for engineering development kits.
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Help with product demo setup and running different demo benchmark/showroom projects as needed.
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Software/Firmware development for FPGA, and RISC-V based SoC platforms as applicable.
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Other circuit and system design projects as they may arise.
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Collaborate with hardware and software teams to understand system architecture and design requirements for integrating our analog in-memory compute chips.
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Develop integration strategies and plans, considering factors such as system compatibility, power consumption, thermal management, and performance optimization.
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Design and implement hardware interfaces for integration of our memory chips and modules into customer systems.
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Configure, validate, and debug hardware components, firmware, and software stacks to ensure proper functionality.
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Test, identify and troubleshoot PCA and integration issues, working closely with cross-functional teams to diagnose and resolve hardware and software-related problems.
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Collaborate with quality assurance teams to define test plans and ensure the robustness and reliability of the integrated system.
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Maintain appropriate documentation of designs and revisions.
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Maintain tracking of boards and components to help ensure inventory integrity and protection of company intellectual property.
Requirements:
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BSEE or MSEE degree or equivalent, and 5-10 years of relevant hands-on board/system design, test, and debug experience
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Proven experience in PCB design, preferably in a professional setting.
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Proficiency in using PCB design software, such as Altium Designer, Cadence Allegro, or Mentor Graphics PADS
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Solid understanding of analog and digital circuit design
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Familiarity with industry standards and regulations for PCB design and manufacturing.
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Strong knowledge of hardware interfaces and protocols (e.g., SPI, UART, GPIO, PCIe) and their integration into system architectures.
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Experience in system integration and testing of hardware and software components, preferably in the semiconductor industry.
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Proficiency in firmware development for microcontrollers or embedded systems, with strong knowledge of programming languages such as C/C++ or Python.
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Ability to work closely with cross-functional teams (hardware, software, testing) to coordinate the integration process and ensure successful customer demos.
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Familiarity with firmware debugging tools and techniques to troubleshoot and resolve integration issues.
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Excellent problem-solving and analytical skills with a keen attention to detail
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Effective communication and collaboration skills to work within cross-functional teams.
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Ability to manage multiple tasks and prioritize work in a dynamic, fast-paced environment, while maintaining a high level of accuracy and attention to detail.
Job Type: Full-time
Pay Range for This Position:
$110,000-250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com
Memory Circuit Design Designer
Location: Fremont, CA
Requirements:
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MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design
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5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries
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Experience in memory circuit design in one of: SRAM, DRAM, Flash or emerging NVM technologies
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Strong understanding of layout design including layout dependent effects, pitch matching, and design for manufacturing
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Familiar with common EDA environment tools, CAD tools and memory design methodology including design, simulation, layout, and verification tools (e.g. Synopsys， Cadence, Mentor Graphics etc.).
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Ability to create innovative architecture and circuit solutions to customer requirements
-
Ability to work in startup environment and work both independently and as a team player
Experience in one or more of the following areas considered a strong plus:
-
Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating etc
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Familiar with memory controller or memory interface
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Experience with emerging non-volatile memory
Job Type: Full-time
Pay Range for This Position:
$110,000 - 250,000 per year
Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer,
Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.
To apply, please send your resume to hrteam@tetramem.com