Accelerate the World
®
Careers
Our Team
Our Team is building the future of technology, and so we look for the best and brightest to help us get there. We are made up of people from across the world striving to be at the forefront of innovation.
Current Positions
Office Assistant/Graphic Design
Location: Fremont, CA
Responsibilities:
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Collaborate with marketing and PR teams to create visually appealing signs, posters, and promotional materials
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Assist in image processing and other graphic design tasks to enhance marketing and branding efforts.
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Enforce brand guidelines and manage marketing assets, including graphic files and templates.
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Contribute to organizing and maintaining TetraMem's photo library for marketing purposes.
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Manage business orders and vendor information, oversee office supply inventory, and handle office supplies orders and payments. Additionally, actively participate in office cleaning, organization, and working collaboratively with all staff.
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Maintain and manage inventory of refreshments and coordinate purchases from Costco/grocery stores.
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Participate in planning, ordering, managing, and setting up office layouts, cubicles, and furniture order.
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Support new employees by providing resources information, setting up desks, ordering office supplies, arranging photo and ID badges, etc.
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Oversee Lunch & Learn scheduling, recruit presenters, and manage team-building activities and points tracking.
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Assist in organizing internal celebrations and events, including preparing and shipping gift bags for visitors, new employees.
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Managing external events and conferences.
Job Type: Part-Time
Pay Range For This Position:
$25 - $40 Per hour
To apply, please send your resume to hrteam@tetramem.com
IC Design Engineer - Entry Level
Location: Singapore
This position is for a new or recent college graduate with a bachelor or master’s degree in electrical or Electronics Engineering. The candidate should be eager to learn and practice the discipline of microchip design and must bring strong technical fundamentals and knowledge of circuit design theory. This rigorous engineering discipline requires technical depth, flexibility, perseverance, and a passion for solving complex and difficult problems.
Requirements:
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MS or BS in Electrical Engineering, Electronics Engineering, or Physics with emphasis on circuit design including analog, digital, and mixed-signal design
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Knowledge of the IC development flow in advanced CMOS processes including design, layout, and tape-out
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Knowledge of the basic theories of digital or analog circuit design
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Ability to create innovative designs and circuit solutions to meet customer requirements
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Ability to work in a startup environment, and to work both independently and as a team player as circumstances indicate
Experience in one or more of the following areas considered a strong plus:
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Previous tape-out experience in industry leading technology nodes
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Familiarity with industry standard IC design CAD tools such as Cadence, Synopsys, or others
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Experience with memory technologies, especially emerging non-volatile memory technologies
Job Type: Full-time
Pay Range For This Position:
SG$30 - SG$50 Per hour
To apply, please send your resume to hrteam@tetramem.com
ASIC/SoC Design Verification Engineer
Location: Fremont, CA
Responsibilities:
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Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
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Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
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Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels.
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Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out.
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Work with design engineers to debug and identify root causes of simulation failure.
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Support test engineers for post-silicon validation.
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Mentor and coach team members and junior engineers. Drive verification efficiency.
Requirements:
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MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
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In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
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Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
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Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
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Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
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Experience in verifying designs at both of RTL level and post-P&R gate level.
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Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
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Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
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Experience in verifying mix-signal design and interface of digital and analog.
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Experience of design verification for highspeed IO such as PCIE and DDR.
Job Type: Full-time
Pay Range For This Position:
$110,000 - $300,000
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
ASIC RTL Design Engineer
Location: Fremont, CA, USA & Singapore
Responsibilities:
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Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs.
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Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.
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Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs.
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Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout.
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Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications.
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Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product.
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Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth.
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Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability.
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Stay up-to-date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency.
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Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery.
Requirements:
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MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design
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Experience with Verilog and system Verilog
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Experience with VCS, Verdi or other industry standard tools
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Experience with pre-layout simulation and post-layout simulation
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Understanding of the design flow. Ability to work with the backend team
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Familiarity with AMBA APB AXI Protocol
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Familiarity with RISC/Arm or other core architectures
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Ability to create innovative architecture and solutions to customer requirements
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Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.
Experience in one or more of the following areas considered a strong plus:
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FPGA/ASIC design of image processing systems
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Working knowledge of SoC architecture such as CPU, GPU or accelerators
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Familiarity with: UVM, place-and-route, STA, EM/IR/Power
Job Type: Full-time
Pay Range For This Position:
Singapore: SG$80,000 - SG$180,000
Fremont, CA, USA: $110,000 - $300,000
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
ASIC Design Verification Engineer
Location: Singapore
Responsibilities:
-
Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
-
Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
-
Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral modules for both block levels and system levels.
-
Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out
-
Work with design engineers to debug and identify root causes of simulation failure
-
Support test engineers for post-silicon validation
-
Mentor and coach junior engineers. Drive verification efficiency
Requirements:
-
MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
-
In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology
-
Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification
-
Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
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Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
-
Experience in verifying designs at both RTL level and post-P&R gate level
-
Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong plus:
-
Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
-
Experience in verifying mix-signal design and interface of digital and analog
-
Experience of design verification for high-speed IO such as PCIE and DDR
Job Type: Full-time
Pay Range For This Position:
SG$80,000 - SG$180,000
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
Sr. Analog/Mixed-Signal IC Verification Engineer
Location: Fremont, CA
Responsibilities:
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Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
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Design and develop verification testbenches using industry-standard verification languages and methodologies
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Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
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Review and analyze verification results, and provide feedback to design teams
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Collaborate with design and layout teams to identify and resolve design issues
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Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
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Sign-off mixed signal designs in preparation for tapeout
Requirements:
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B.S. EE and 7+ years of relevant industry experience or equivalent
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Strong understanding of analog and mixed-signal circuit design and verification principles
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Ability to write test plans, present results, and communicate clearly with multi-functional teams
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Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection
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Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
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Excellent debugging, problem-solving and analytical skills
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Strong communication and teamwork skills
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Familiarity with analog behavioral models is a plus
Job Type: Full-time
Pay Range For This Position:
$110,000 - $300,000 per year
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
Sr. Embedded Software Engineer
Location: Fremont, CA
Requirements:
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MS with 5+ years of related experience
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Experience with Embedded system development or FPGA
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Ability to work in a startup environment and work both independently and as a team player
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Ability to provide technical leadership to other members of the engineering team
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Track record of shipping products as an embedded software engineer
Experience in one or more of the following areas is considered as a strong plus:
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Experience with ML compilers such as TVM, XLA, Glow, GGML as well as compiler frameworks such as MLIR
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Experience with the internals of ML frameworks and runtimes such as PyTorch, TF, TFLite and TFLite Micro
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Experience with ML, work with edge light-weight AL models
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Publications or talks in top relevant conferences on software development
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Hands-on experience on developing compiler libraries or tools
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Hands-on experience with driver development for ASIC/FPGA
Job Type: Full-time
Pay Range for This Position:
$220,000 - $300,000 per year
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
Memory Circuit Design Engineer
Location: Fremont, CA
Requirements:
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MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design
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5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be considered as experience), successful tape-out experience with leading foundries
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Experience in memory circuit design in one of: SRAM, DRAM, Flash or emerging NVM technologies
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Strong understanding of layout design including layout dependent effects, pitch matching, and design for manufacturing
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Familiar with common EDA environment tools, CAD tools and memory design methodology including design, simulation, layout, and verification tools (e.g. Synopsys， Cadence, Mentor Graphics etc.).
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Ability to create innovative architecture and circuit solutions to customer requirements
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Ability to work in startup environment and work both independently and as a team player
Experience in one or more of the following areas considered a strong plus:
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Hands-on production experience with key memory blocks such as sense amplifier, charge pump, read/write assist circuit, PVT tracker, power gating etc
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Familiar with memory controller or memory interface
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Experience with emerging non-volatile memory
Job Type: Full-time
Pay Range for This Position:
$110,000 - $300,000 per year
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
Application Engineer
Location: Fremont, CA
Responsibilities:
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Provide exceptional technical support to customers, addressing their inquiries and issues related to our AI in-memory computing products, Instinct Software and SDKs.
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Collaborate closely with customers to assist in integrating our software and SDKs into their applications, ensuring seamless performance and functionality
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Identify and troubleshoot technical challenges, delivering effective solutions to customer problems and ensuring their satisfaction
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Create and maintain technical documentation, including user guides and FAQs, to aid customers in utilizing our products effectively
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Act as a bridge between customers and our product developments teams, conveying customer feedback, feature requests, and improvement suggestions
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Maintain in-depth knowledge of our AI in-memory computing solutions, staying up-to-date with product updates, enhancements, and industry trends
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Provide training to customers on the proper use and best practices of our products, ensuring they maximize their potential
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Collaborate with the Business Development team to support pre-sales activities, including technical presentations, demonstrations, and customer discussions
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Foster long-term relationships with customers, ensuring they receive ongoing technical support, updates, and assistance
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Offer guidance to customers on optimizing the performance of their AI applications through our solutions
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Monitor and report software bugs or issues to the development team, ensuring prompt resolution and customer satisfaction
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Collaborate with Software Engineering, Product Management, and other cross-functional teams to ensure the alignment of customer needs with product development
Requirements:
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Preferred MS with 5+ years of experience or PhD in Computer Science or Computer Engineering
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Strong analytical and problem-solving skills to identify and address software issues and optimize code.
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Ability to work in a startup environment and work both independently and as a team
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Ability to provide technical leadership to other members of the engineering team
Job Type: Full-time
Pay Range for This Position:
$110,000 - $300,000 per year
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com
Head/Sr. Director of Foundry Interface and Process Integration
Location: Fremont, CA
Responsibilities:
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Lead foundry process integration and efficient resource utilization
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Define and implement strategies for fab integrating processes
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Collaborate with R&D for product innovation and quality
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Ensure compliance with regulatory and quality standards
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Budget and resource management for cost-effective operations
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Partner selection and contract negotiation with foundry providers
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Continuous assessment and optimization of foundry processes
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Quality assurance implementation for high product standards
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Mentorship and professional development of team members
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Stay updated with the latest smart sensor advancements
Requirements:
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Bachelor's or Master's degree in Engineering, Electrical Engineering, or related field (Advanced degree preferred)
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Proven experience in foundry integration, process integration, and smart sensor technology
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Strong leadership and team management skills
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Excellent communication and problem-solving abilities
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Knowledge of industry regulations and compliance standards
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Smart Sensor and CMOS Image sensor experience preferred
Job Type: Full-time
Pay Range for This Position:
$200,000 - $300,000 per year
To apply, please send your resume to hrteam@tetramem.com
Memory Test Engineer
Location: Fremont, CA
Requirements:
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MS of PhD in Electrical Engineering with Emphasis on semiconductor and non-volatile memory
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5+ years of experience in non-volatile memory testing, with a strong understanding of non-volatile memory technologies and testing equipment
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Experience in memory testing in non-volatile memory products, including NAND flash, NOR flash, SSDs, and emerging non-volatile memory technologies.
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Proficiency in scripting languages (e.g., Python) and experience with test automation tools.
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Strong problem-solving skills and the ability to troubleshoot complex issues.
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Excellent analytical and data interpretation skills.
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Knowledge of industry standards and best practices in memory testing.
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Strong communication and teamwork skills.
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Self-motivated and able to work independently.
Experience in one or more of the following areas is considered a strong plus:
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Develop comprehensive test strategies for a range of multi-level memory products, including Multi-Level Cell (MLC) and Triple-Level Cell (TLC) NAND flash, multi-level non-volatile memory technologies, and emerging multi-level memory technologies.
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Create and implement test plans that encompass a variety of multi-level memory test cases, conditions, and procedures.
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Analyze multi-level memory test data to identify trends, anomalies, and opportunities for improvement, offering data-driven insights and recommendations.
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Develop and maintain automated test scripts tailored to optimize the multi-level memory testing process.
Pay Range for This Position:
$110,000 - $300,000 per year
All of our openings span various levels, ranging from Engineer to Senior Principal Engineer, including corresponding management roles. Our job levels and salaries are clearly structured, reflecting the candidates' backgrounds and experience to ensure a fair and transparent progression in their careers.
To apply, please send your resume to hrteam@tetramem.com